{"id":99,"date":"2026-01-31T13:40:52","date_gmt":"2026-01-31T13:40:52","guid":{"rendered":"https:\/\/fpgasourcing.com\/?page_id=99"},"modified":"2026-01-31T14:30:51","modified_gmt":"2026-01-31T14:30:51","slug":"fpga-lifecycle-management","status":"publish","type":"page","link":"https:\/\/fpgasourcing.com\/hu\/fpga-lifecycle-management\/","title":{"rendered":"FPGA Lifecycle Management: EOL Planning, Risk Mitigation &amp; Long-Term Supply"},"content":{"rendered":"<div data-elementor-type=\"wp-page\" data-elementor-id=\"99\" class=\"elementor elementor-99\" data-elementor-post-type=\"page\">\n\t\t\t\t<div class=\"elementor-element elementor-element-3765592 e-flex e-con-boxed e-con e-parent\" data-id=\"3765592\" data-element_type=\"container\" data-e-type=\"container\">\n\t\t\t\t\t<div class=\"e-con-inner\">\n\t\t\t\t<div class=\"elementor-element elementor-element-3c12484 elementor-widget elementor-widget-html\" data-id=\"3c12484\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"html.default\">\n\t\t\t\t\t<main class=\"fpga-lifecycle-page\">\r\n\r\n<style>\r\n  :root{\r\n    --ink:#0a2540;\r\n    --blue:#0061ff;\r\n    --text:#425466;\r\n    --muted:#6b7c93;\r\n    --bg:#ffffff;\r\n    --soft:#f6f9fc;\r\n    --soft2:#f0f7ff;\r\n    --border:#e6ebf1;\r\n    --warn:#b45309;\r\n    --bad:#b91c1c;\r\n    --shadow:0 10px 28px rgba(10,37,64,.08);\r\n  }\r\n\r\n  .fpga-lifecycle-page{\r\n    font-family: \"Segoe UI\", Roboto, Helvetica, Arial, sans-serif;\r\n    line-height:1.7;\r\n    color:var(--text);\r\n    background:var(--bg);\r\n    width: 100%;\r\n    margin:0 auto;\r\n    padding:40px 20px 80px;\r\n  }\r\n\r\n  h1{\r\n    font-size:2.5rem;\r\n    color:var(--ink);\r\n    letter-spacing:-0.02em;\r\n    margin-bottom:14px;\r\n  }\r\n\r\n  h2{\r\n    margin-top:56px;\r\n    margin-bottom:18px;\r\n    font-size:1.9rem;\r\n    color:var(--ink);\r\n    border-left:4px solid var(--blue);\r\n    padding-left:14px;\r\n  }\r\n\r\n  h3{\r\n    margin-top:28px;\r\n    font-size:1.25rem;\r\n    color:var(--ink);\r\n  }\r\n\r\n  p{\r\n    font-size:1.08rem;\r\n    margin-bottom:16px;\r\n  }\r\n\r\n  .lead{\r\n    background:var(--soft);\r\n    border:1px solid var(--border);\r\n    border-radius:16px;\r\n    padding:22px;\r\n    box-shadow:var(--shadow);\r\n  }\r\n\r\n  .lead strong{color:var(--ink)}\r\n\r\n  .two-col{\r\n    display:grid;\r\n    grid-template-columns:1fr 1fr;\r\n    gap:18px;\r\n  }\r\n\r\n  .card{\r\n    border:1px solid var(--border);\r\n    border-radius:14px;\r\n    padding:18px;\r\n    background:#fff;\r\n    box-shadow:0 8px 24px rgba(10,37,64,.06);\r\n  }\r\n\r\n  .card.soft{\r\n    background:var(--soft2);\r\n    border-color:#cce3ff;\r\n  }\r\n\r\n  .mini{\r\n    color:var(--muted);\r\n    font-size:.98rem;\r\n  }\r\n\r\n  .table-wrap{\r\n    margin-top:20px;\r\n    border:1px solid var(--border);\r\n    border-radius:14px;\r\n    overflow:hidden;\r\n  }\r\n\r\n  table{\r\n    width:100%;\r\n    border-collapse:collapse;\r\n  }\r\n\r\n  th{\r\n    background:var(--ink);\r\n    color:#fff;\r\n    text-align:left;\r\n    padding:14px;\r\n    font-size:1rem;\r\n  }\r\n\r\n  td{\r\n    padding:14px;\r\n    border-bottom:1px solid var(--border);\r\n    vertical-align:top;\r\n    background:#fff;\r\n  }\r\n\r\n  tr:nth-child(even) td{\r\n    background:#f9fbff;\r\n  }\r\n\r\n  .risk-high{color:var(--bad); font-weight:700;}\r\n  .risk-mid{color:var(--warn); font-weight:700;}\r\n\r\n  .steps{\r\n    display:grid;\r\n    grid-template-columns:repeat(auto-fit,minmax(240px,1fr));\r\n    gap:16px;\r\n  }\r\n\r\n  .step{\r\n    border:1px solid var(--border);\r\n    border-radius:14px;\r\n    padding:18px;\r\n    background:#fff;\r\n  }\r\n\r\n  .step-num{\r\n    width:36px;\r\n    height:36px;\r\n    border-radius:10px;\r\n    background:rgba(0,97,255,.12);\r\n    color:var(--blue);\r\n    font-weight:800;\r\n    display:flex;\r\n    align-items:center;\r\n    justify-content:center;\r\n    margin-bottom:10px;\r\n  }\r\n\r\n  .tags{\r\n    display:flex;\r\n    flex-wrap:wrap;\r\n    gap:10px;\r\n    margin-top:14px;\r\n  }\r\n\r\n  .tag{\r\n    background:#e9eef6;\r\n    border:1px solid var(--border);\r\n    padding:6px 12px;\r\n    border-radius:8px;\r\n    font-size:.95rem;\r\n    font-weight:700;\r\n    color:var(--ink);\r\n  }\r\n\r\n  .cta{\r\n    margin-top:64px;\r\n    padding:28px;\r\n    background:linear-gradient(180deg,#f6f9fc,#ffffff);\r\n    border:1px solid var(--border);\r\n    border-radius:18px;\r\n    text-align:center;\r\n    box-shadow:var(--shadow);\r\n  }\r\n\r\n  .cta h2{\r\n    border:none;\r\n    padding:0;\r\n    margin-top:0;\r\n    font-size:1.8rem;\r\n  }\r\n\r\n  .cta p{\r\n    max-width:900px;\r\n    margin:0 auto 18px;\r\n    color:var(--muted);\r\n  }\r\n\r\n  .btn{\r\n    display:inline-block;\r\n    padding:14px 26px;\r\n    background:var(--blue);\r\n    color:#fff;\r\n    border-radius:10px;\r\n    font-weight:800;\r\n    text-decoration:none;\r\n  }\r\n\r\n  .btn:hover{\r\n    background:#004ecc;\r\n  }\r\n\r\n  @media(max-width:900px){\r\n    .two-col{grid-template-columns:1fr}\r\n    h1{font-size:2.1rem}\r\n  }\r\n<\/style>\r\n\r\n<h1>FPGA \u00c9letciklus Menedzsment: EOL Tervez\u00e9s, Kock\u00e1zatcs\u00f6kkent\u00e9s \u00e9s Hossz\u00fa T\u00e1v\u00fa Ell\u00e1t\u00e1s<\/h1>\r\n\r\n<div class=\"lead\">\r\n  <p>\r\n    A hossz\u00fa \u00e9letciklus\u00fa ipar\u00e1gakban, mint p\u00e9ld\u00e1ul az ipari automatiz\u00e1l\u00e1s, orvostechnikai elektronika \u00e9s k\u00f6zleked\u00e9si infrastrukt\u00fara, az FPGA el\u00e9rhet\u0151s\u00e9ge ritk\u00e1n egyezik meg a rendszer szolg\u00e1ltat\u00e1si \u00e9lettartam\u00e1val. Mik\u00f6zben a telep\u00edtett platformok t\u00e1mogathatj\u00e1k\r\n    <strong>10\u201320 \u00e9vet vagy ann\u00e1l t\u00f6bbet<\/strong>, az FPGA csal\u00e1dok <strong>\u00c9letciklus V\u00e9ge (EOL)<\/strong> vagy elavultt\u00e1 v\u00e1lhatnak\r\n    <strong>sokkal kor\u00e1bban.<\/strong> Proakt\u00edv tervez\u00e9s hi\u00e1ny\u00e1ban az elavult FPGA ell\u00e1t\u00e1s reakt\u00edv beszerz\u00e9si probl\u00e9m\u00e1v\u00e1 v\u00e1lik \u2014 gyakran k\u00e9nyszer\u00edtve az OEM-eket nem tervezett \u00fajratervez\u00e9sekre, valid\u00e1l\u00e1si \u00fajramunk\u00e1latokra, vagy a magas kock\u00e1zat\u00fa m\u00e1sodlagos piacoknak val\u00f3 kitetts\u00e9gre.\r\n  <\/p>\r\n  <p class=\"mini\">\r\n    EOL Tervez\u00e9s Elavult \u00e9s Megsz\u00fcntetett FPGA Eszk\u00f6z\u00f6k Sz\u00e1m\u00e1ra\r\n  <\/p>\r\n<\/div>\r\n\r\n<h2>A hat\u00e9kony FPGA \u00e9letciklus menedzsment m\u00e1r j\u00f3val a hivatalos Term\u00e9k Megsz\u00fcntet\u00e9si \u00c9rtes\u00edt\u00e9s (PDN) el\u0151tt kezd\u0151dik. A gyakorlatban<\/h2>\r\n\r\n<p>\r\n  az elavult FPGA beszerz\u00e9s <strong>kih\u00edv\u00e1sai gyakran fokozatosan jelennek meg az allok\u00e1ci\u00f3s nyom\u00e1s, a lead id\u0151 volatilit\u00e1s \u00e9s a cs\u00f6kken\u0151 csatorna el\u00e9rhet\u0151s\u00e9g r\u00e9v\u00e9n.<\/strong> Korai Kock\u00e1zati Jelek\r\n<\/p>\r\n\r\n<div class=\"two-col\">\r\n  <div class=\"card\">\r\n    <h3>PCN bejelent\u00e9sek fokozott gyakoris\u00e1ga<\/h3>\r\n    <ul>\r\n      <li>Hosszabb vagy instabil lead id\u0151k az enged\u00e9lyezett csatorn\u00e1kb\u00f3l<\/li>\r\n      <li>A gy\u00e1rt\u00f3 \u00fctemterv\u00e9nek elhajl\u00e1sa a k\u00e9sz\u00fcl\u00e9kcsal\u00e1dt\u00f3l<\/li>\r\n      <li>N\u00f6vekv\u0151 \u00e1rk\u00fcl\u00f6nbs\u00e9gek az f\u00fcggetlen piacon<\/li>\r\n      <li>Mi\u00e9rt K\u00e9slekednek az OEM-ek \u2014 \u00e9s a K\u00f6lts\u00e9g<\/li>\r\n    <\/ul>\r\n  <\/div>\r\n\r\n  <div class=\"card soft\">\r\n    <h3>Az \u00fajratervez\u00e9si NRE gyakran meghaladja a kezdeti alkatr\u00e9sz megtakar\u00edt\u00e1sokat<\/h3>\r\n    <ul>\r\n      <li>A firmware \u00e9s a rendszer valid\u00e1l\u00e1s\u00e1nak meg kell ism\u00e9tl\u0151dnie<\/li>\r\n      <li>A szab\u00e1lyoz\u00e1si dokument\u00e1ci\u00f3 friss\u00edt\u00e9seket vagy \u00e1tn\u00e9z\u00e9st ig\u00e9nyelhet<\/li>\r\n      <li>A termel\u00e9s folytonoss\u00e1ga bizonytalann\u00e1 v\u00e1lik<\/li>\r\n      <li>\u00c9letciklus F\u00e1zisok \u00e9s Beszerz\u00e9si Strat\u00e9gia<\/li>\r\n    <\/ul>\r\n  <\/div>\r\n<\/div>\r\n\r\n<h2>A beszerz\u00e9si priorit\u00e1soknak az \u00e9letciklus f\u00e1zis\u00e1val p\u00e1rhuzamosan kell fejl\u0151dni\u00fck. Az al\u00e1bbi t\u00e1bl\u00e1zat a javasolt int\u00e9zked\u00e9seket tartalmazza, k\u00fcl\u00f6n\u00f6s hangs\u00falyt fektetve az EOL \u00e9s megsz\u00fcntetett FPGA eszk\u00f6z\u00f6kre.<\/h2>\r\n\r\n<p>\r\n  F\u00e1zis\r\n<\/p>\r\n\r\n<div class=\"table-wrap\">\r\n  <table>\r\n    <thead>\r\n      <tr>\r\n        <th>Piaci Jellemz\u0151k<\/th>\r\n        <th>Beszerz\u00e9si F\u00f3kusz<\/th>\r\n        <th>Akt\u00edv<\/th>\r\n      <\/tr>\r\n    <\/thead>\r\n    <tbody>\r\n      <tr>\r\n        <td><strong>Stabil termel\u00e9s, norm\u00e1l lead id\u0151k, teljes gy\u00e1ri t\u00e1mogat\u00e1s<\/strong><\/td>\r\n        <td>El\u0151rejelz\u00e9s \u00f6sszehangol\u00e1s, pufferterv k\u00e9sz\u00edt\u00e9s, korai alternat\u00edva \u00e9rt\u00e9kel\u00e9s<\/td>\r\n        <td>\u00c9rett<\/td>\r\n      <\/tr>\r\n      <tr>\r\n        <td><strong>\u00daj tervek lebesz\u00e9lve, korai PCN tev\u00e9kenys\u00e9g<\/strong><\/td>\r\n        <td>Kock\u00e1zat \u00e9rt\u00e9kel\u00e9s, \u00fctemterv monitoroz\u00e1s, EOL forgat\u00f3k\u00f6nyvek el\u0151k\u00e9sz\u00edt\u00e9se<\/td>\r\n        <td>Cs\u00f6kken\u0151<\/td>\r\n      <\/tr>\r\n      <tr>\r\n        <td><strong>PDN kiadva, allok\u00e1ci\u00f3 szorosabb\u00e1 v\u00e1lik<\/strong><\/td>\r\n        <td>Utols\u00f3 V\u00e1s\u00e1rl\u00e1s (LTB) tervez\u00e9s \u00e9s v\u00e9grehajt\u00e1s<\/td>\r\n        <td class=\"risk-mid\">EOL \/ Elavult<\/td>\r\n      <\/tr>\r\n      <tr>\r\n        <td><strong>Nincs gy\u00e1ri termel\u00e9s, csatorna ki\u00fcr\u00fcl\u00e9s<\/strong><\/td>\r\n        <td>Megsz\u00fcntetett FPGA beszerz\u00e9s nyomon k\u00f6vethet\u0151 f\u00fcggetlen ell\u00e1t\u00e1s r\u00e9v\u00e9n<\/td>\r\n        <td class=\"risk-high\">Elavult FPGA Beszerz\u00e9si V\u00e9grehajt\u00e1s<\/td>\r\n      <\/tr>\r\n    <\/tbody>\r\n  <\/table>\r\n<\/div>\r\n\r\n<h2>Mikor a k\u00e9sz\u00fcl\u00e9kek el\u00e9rik az EOL-t, a beszerz\u00e9si v\u00e9grehajt\u00e1s \u2014 nem a tervez\u00e9si elm\u00e9let \u2014 hat\u00e1rozza meg a sikert. Ebben a szakaszban az el\u00e9rhet\u0151s\u00e9g, az autentikuss\u00e1g \u00e9s a sz\u00e1ll\u00edt\u00e1si diszcipl\u00edna fontosabb, mint a nomin\u00e1lis \u00e1rak.<\/h2>\r\n\r\n<p>\r\n  Manu\u00e1lis PCN \/ PDN Nyomon k\u00f6vet\u00e9s\r\n<\/p>\r\n\r\n<div class=\"steps\">\r\n  <div class=\"step\">\r\n    <div class=\"step-num\">1<\/div>\r\n    <strong>A gy\u00e1rt\u00f3i bejelent\u00e9sek, nyilv\u00e1nos \u00e9rtes\u00edt\u00e9sek \u00e9s k\u00f6zvetlen kommunik\u00e1ci\u00f3 figyelemmel k\u00eds\u00e9r\u00e9se a megsz\u00fcntet\u00e9si kock\u00e1zat korai azonos\u00edt\u00e1s\u00e1ra.<\/strong>\r\n    <p class=\"mini\">\r\n      LTB Tervez\u00e9s \u00e9s Koordin\u00e1ci\u00f3\r\n    <\/p>\r\n  <\/div>\r\n\r\n  <div class=\"step\">\r\n    <div class=\"step-num\">2<\/div>\r\n    <strong>A v\u00e1rhat\u00f3 \u00e9lethossz becsl\u00e9s\u00e9nek t\u00e1mogat\u00e1sa \u00e9s a v\u00e1s\u00e1rl\u00e1si id\u0151z\u00edt\u00e9s koordin\u00e1l\u00e1sa a v\u00e9gs\u0151 rendel\u00e9si ablakok bez\u00e1r\u00e1sa el\u0151tt.<\/strong>\r\n    <p class=\"mini\">\r\n      Megsz\u00fcntetett FPGA Beszerz\u00e9s\r\n    <\/p>\r\n  <\/div>\r\n\r\n  <div class=\"step\">\r\n    <div class=\"step-num\">3<\/div>\r\n    <strong>A fennmarad\u00f3 glob\u00e1lis k\u00e9szlet azonos\u00edt\u00e1sa ellen\u0151rz\u00f6tt f\u00fcggetlen csatorn\u00e1kon, amikor az enged\u00e9lyezett ell\u00e1t\u00e1s m\u00e1r nem el\u00e9rhet\u0151.<\/strong>\r\n    <p class=\"mini\">\r\n      Identifying remaining global inventory through vetted independent channels when authorized supply is no longer available.\r\n    <\/p>\r\n  <\/div>\r\n\r\n  <div class=\"step\">\r\n    <div class=\"step-num\">4<\/div>\r\n    <strong>Harmadik f\u00e9l \u00e1lk\u00e9szlet-ellen\u0151rz\u00e9se<\/strong>\r\n    <p class=\"mini\">\r\n      K\u00e9pzett k\u00fcls\u0151 laborat\u00f3riumokkal dolgozunk, hogy a sz\u00fcks\u00e9ges vizsg\u00e1latokat, elektromos tesztel\u00e9st \u00e9s ellen\u0151rz\u00e9st elv\u00e9gezz\u00fck.\r\n    <\/p>\r\n  <\/div>\r\n\r\n  <div class=\"step\">\r\n    <div class=\"step-num\">5<\/div>\r\n    <strong>R\u00f6vid t\u00e1v\u00fa t\u00e1rol\u00e1s \u00e9s sz\u00e1ll\u00edt\u00e1si t\u00e1mogat\u00e1s<\/strong>\r\n    <p class=\"mini\">\r\n      T\u00e9telek szakaszos sz\u00e1ll\u00edt\u00e1s\u00e1nak \u00e9s r\u00f6vid t\u00e1v\u00fa t\u00e1rol\u00e1s\u00e1nak koordin\u00e1l\u00e1sa az ell\u00e1t\u00e1s \u00e9s a termel\u00e9si \u00fctemtervek \u00f6sszehangol\u00e1s\u00e1hoz.\r\n    <\/p>\r\n  <\/div>\r\n<\/div>\r\n\r\n<h2>EU-k\u00f6zpont\u00fa ell\u00e1t\u00e1s hossz\u00fa \u00e9lettartam\u00fa ipar\u00e1gak sz\u00e1m\u00e1ra<\/h2>\r\n\r\n<p>\r\n  Ezek a kih\u00edv\u00e1sok a leg\u00e9lesebbek azokban az ipar\u00e1gakban, ahol szigor\u00fa folytonoss\u00e1gi k\u00f6vetelm\u00e9nyek \u00e9s hossz\u00fa t\u00e1v\u00fa t\u00e1mogat\u00e1si k\u00f6telezetts\u00e9gek vannak.\r\n  Szolg\u00e1ltat\u00e1saink els\u0151sorban az eur\u00f3pai OEM-ekhez igazodnak, sz\u00e9lesebb forr\u00e1sokkal, amelyek a v\u00e1llalati politik\u00e1nak megfelelnek.\r\n<\/p>\r\n\r\n<div class=\"tags\">\r\n  <span class=\"tag\">Ipari automatiz\u00e1l\u00e1s<\/span>\r\n  <span class=\"tag\">Orvosi elektronika<\/span>\r\n  <span class=\"tag\">K\u00f6zleked\u00e9si rendszerek<\/span>\r\n  <span class=\"tag\">Energia \u00e9s infrastrukt\u00fara<\/span>\r\n<\/div>\r\n\r\n<p class=\"mini\">\r\n  A <strong>HK EQGOO LIMITED<\/strong>szerepe nem az, hogy helyettes\u00edtse a m\u00e9rn\u00f6ki d\u00f6nt\u00e9seket, hanem hogy v\u00e9grehajtsa a kock\u00e1zatcs\u00f6kkent\u00e9sre \u00f6sszpontos\u00edt\u00f3, fegyelmezett beszerz\u00e9si strat\u00e9gi\u00e1kat,\r\n  amikor az FPGA-eszk\u00f6z\u00f6k elavultt\u00e1 v\u00e1lnak vagy megsz\u0171nnek.\r\n<\/p>\r\n\r\n<div class=\"cta\">\r\n  <h2>Tervezze meg az elavult FPGA ell\u00e1t\u00e1st, miel\u0151tt a piac r\u00e1k\u00e9nyszer\u00edten\u00e9.<\/h2>\r\n  <p>\r\n    Ha EOL \u00e9rtes\u00edt\u00e9sekkel, allok\u00e1ci\u00f3s nyom\u00e1ssal vagy megsz\u0171n\u0151 FPGA kih\u00edv\u00e1sokkal n\u00e9z szembe,\r\n    seg\u00edthet\u00fcnk felm\u00e9rni a kock\u00e1zatokat \u00e9s koordin\u00e1lni a megb\u00edzhat\u00f3 forr\u00e1st a termel\u00e9si \u00fctemterv\u00e9hez igazodva.\r\n  <\/p>\r\n  <a class=\"btn\" href=\"https:\/\/fpgasourcing.com\/hu\/contact\/\">L\u00e9pjen kapcsolatba csapatunkkal<\/a>\r\n  <p class=\"mini\" style=\"margin-top:12px;\">\r\n    El\u0151nyben r\u00e9szes\u00edti az e-mailt? <a href=\"mailto:support@fpgasourcing.com\">support@fpgasourcing.com<\/a>\r\n  <\/p>\r\n<\/div>\r\n\r\n<\/main>\r\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<\/div>","protected":false},"excerpt":{"rendered":"<p>FPGA Lifecycle Management: EOL Planning, Risk Mitigation &#038; Long-Term Supply In long-lifecycle industries such as industrial automation, medical electronics, and transportation infrastructure, FPGA availability rarely aligns with system service life. While deployed platforms may require support for 10\u201320 years or more, FPGA families can reach End-of-Life (EOL) or become obsolete much earlier. Without proactive planning, [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"rank_math_title":"FPGA Lifecycle Management: EOL Planning &amp; Obsolete FPGA Sourcing","rank_math_description":"Manage FPGA EOL risk and obsolete FPGA sourcing with disciplined procurement execution. We support European OEMs with EOL planning, discontinued FPGA supply and risk mitigation.\n","footnotes":""},"class_list":["post-99","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/fpgasourcing.com\/hu\/wp-json\/wp\/v2\/pages\/99","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/fpgasourcing.com\/hu\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/fpgasourcing.com\/hu\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/fpgasourcing.com\/hu\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/fpgasourcing.com\/hu\/wp-json\/wp\/v2\/comments?post=99"}],"version-history":[{"count":5,"href":"https:\/\/fpgasourcing.com\/hu\/wp-json\/wp\/v2\/pages\/99\/revisions"}],"predecessor-version":[{"id":115,"href":"https:\/\/fpgasourcing.com\/hu\/wp-json\/wp\/v2\/pages\/99\/revisions\/115"}],"wp:attachment":[{"href":"https:\/\/fpgasourcing.com\/hu\/wp-json\/wp\/v2\/media?parent=99"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}